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Allwinner /D1H /UART[3] /MCR

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Interpret as MCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (deasserted)dtr 0 (deasserted)rts 0 (normal)loop 0 (disabled)afce 0 (UART)function

dtr=deasserted, rts=deasserted, loop=normal, afce=disabled, function=UART

Description

UART Modem Control Register

Fields

dtr

Data Terminal Ready

0 (deasserted): undefined

1 (asserted): undefined
rts

Request to Send

0 (deasserted): undefined

1 (asserted): undefined
loop

Loop Back Mode

0 (normal): undefined

1 (loop_back): undefined
afce

Auto Flow Control Enable

0 (disabled): undefined

1 (enabled): undefined
function

UART Function: Select IrDA or RS485

0 (UART): undefined

1 (IrDA_SIR): undefined

2 (RS485): undefined

3 (reserved): undefined

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data